£107.98

Springer Digital Timing Macromodeling for VLSI Design Verification

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Description

Master the complexities of VLSI design verification with this specialized text from Springer. This book provides a deep dive into the history and evolution of simulation techniques, offering a foundation for understanding modern digital macromodels. Readers will find detailed discussions on various implementation methods, including circuit, timing, fast-timing, switch-level, and gate-level simulation. The content explores mixed-mode simulation and interconnection analysis methods to provide a comprehensive view of the field. By reviewing the advantages and disadvantages of different techniques in Chapter 2, this book helps engineers and students understand which methods are most effective for modern digital design. It is an essential resource for those working in computer science architecture and microprocessor design who require a technical understanding of timing macromodeling.

Key Features

Comprehensive history of simulation techniques to provide context for modern digital design and verification processes.

Detailed analysis of circuit, timing, fast-timing, and gate-level simulation methods used in VLSI design.

In-depth coverage of switch-level timing and switch-level simulation for advanced design verification.

Examination of mixed-mode simulation and interconnection analysis methods for complex system modeling.

Comparative review of modern digital macromodel techniques to help identify specific advantages and disadvantages.

Product Specifications

Format
paperback
Domain
Amazon UK
Publication Date
03 October 2012
Listed Since
14 July 2013

Barcode

No barcode data available

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