LAP Lambert Academic Publishing Single Event Upsets in Sub-65nm CMOS technologies: Monte-Carlo simulations and contribution to understanding of physical mechanisms

Product Description Aggressive integrated circuit density increase and power supply scaling have propelled Single Event Effects to the forefront of reliability concerns in ground-based and space-bound electronic systems. This study focuses on modeling of Single Event physical phenomena. To enable performing reliability assessment, a complete simulation platform named Tool suIte for rAdiation Reliability Assessment (TIARA) has been developed that allows performing sensitivity prediction of different digital circuits (SRAM, Flip-Flops, etc.) in different radiation environments and at different operating conditions (power supply voltage, altitude, etc.) TIARA has been extensively validated with experimental data for space and terrestrial radiation environments using different test vehicles manufactured by STMicroelectronics. Finally, the platform has been used during rad-hard digital circuits design and to provide insights into radiation-induced upset mechanisms down to CMOS 20nm technological node. About the Author received his MSEE with honors from the Technical University of Lodz, Poland in 2008 and PhD from the University of Marseille, France in 2011. His research interests include modeling of Single Event Effects in ASICs/FPGAs for high reliability space and terrestrial applications. He has coauthored more than 15 articles in radiation effect modeling.