Design for Yield and Reliability for Nanometer CMOS Digital Circuits: Statistical design, Soft errors modeling, Adaptive body bias, Negative capacitance circuits - Image 1

£50.00

LAP Lambert Academic Publishing Design for Yield and Reliability for Nanometer CMOS Digital Circuits: Statistical design, Soft errors modeling, Adaptive body bias, Negative capacitance circuits

Name: Design for Yield and Reliability for Nanometer CMOS Digital Circuits: Statistical design, Soft errors modeling, Adaptive body bias, Negative capacitance circuits
Brand: LAP Lambert Academic Publishing
Price: 50.0 GBP
Availability: InStock

Electronics Engineering

Price data last checked 51 day(s) ago - refreshing...

View at Amazon

Price History & Forecast

Last 40 days • 40 data points (No recent data available)

Historical

Generating forecast...

Price Distribution

Price distribution over 40 days • 1 price levels

Days at Price

Price Analysis

Most common price: £50 (40 days, 100.0%)

Price range: £50 - £50

Price levels: 1 different prices over 40 days

Product Specifications

Brand: LAP Lambert Academic Publishing
Format: paperback
ASIN: 365951361X
Category: Books > Subjects > Science, Nature & Maths > Engineering & Technology > Electronics & Communications Engineering > Electronics Engineering
Domain: Amazon UK
Publication Date: 26 January 2014
Listed Since: 27 January 2014

Barcode

No barcode data available

LAP Lambert Academic Publishing Design for Yield and Reliability for Nanometer CMOS Digital Circuits: Statistical design, Soft errors modeling, Adaptive body bias, Negative capacitance circuits

Price History & Forecast

Price Distribution

Price Analysis

Product Specifications

Barcode

Similar Products You Might Like

Transistor-Level Defect-Tolerant Techniques for Reliable Design: at the Nanoscale

Device Modeling in CMOS Integrated Circuits: Interconnects, Inductors and Transformers

Digital Circuits Design with Multi-input Majority for Nanotechnology

Analog CMOS VLSI Circuits: CMOS OTRA and OFC Realizations and Applications

Enhanced Low power CMOS Current Mirror Design

Digital CMOS Comparator Design using VLSI

Impact of Leakage Power Reduction Techniques on Parametric Yield: Low-Power Design of Digital Integrated Circuits under Process Parameter Variations

Scalable and low power N.O.C design for reconfigurable system

Design of Softcore DSP Processors on FPGA Chips

Electronic Small-signal Amplifier Circuits Using VFOAs And CFOAs: Analysis, Design and Modelling: Monograph

Integrated Electronics Analog Digital Circuits

Electronic Devices and Circuit Theory

Design and Implementation of Coding Algorithms for Network on Chip

Optimization Algorithms For Reconfigurable FPGA Based Architectures: FPGA, design flow, reconfigurable architectures, System on Programmable chip

Microelectronics

Ge-based channel MOSFETs: Process Integration and Performance Evaluation for Sub-22nm Node Digital CMOS Logic Technology

Advanced Technological Transistors For Microelectronics and Nanosystem: Detailed Description of Advanced Transistors for different technological nodes and integration in Digital Systems

Study of Nanomaterials: Opto-Electronic Devices and DMS Based Applications

DIGITAL ELECTRONICS FOR UNDERGRADUATES: Electrical/Electronics, Physics and Computer Science

Digital Electronics: An Introductory Course to Concepts, Principles and Devices

Particle swarm optimization for electronic circuit design automation

MICROCONTROLLER BASED SYSTEM DESIGN

Influence of Temperature on Nanoscale Semiconductor Devices: Analyzing Temperature-Induced Variations in Electron Transport of Double-Gate and Silicon-On-Insulator MOSFETs

Investigation of Ultra-Scaled Multi-Gate Transistors: Design and Analysis