Designing Digital Comp Sys Verilog - Image 1

£52.38

Cambridge University Press Designing Digital Comp Sys Verilog

Name: Designing Digital Comp Sys Verilog
Brand: Cambridge University Press
Price: 52.38 GBP
Availability: InStock

Architecture & Microprocessors

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Description

This book serves both as an introduction to computer architecture and as a guide to using a hardware description language (HDL) to design, model and simulate real digital systems. The book starts with an introduction to Verilog - the HDL chosen for the book since it is widely used in industry and straightforward to learn. Next, the instruction set architecture (ISA) for the simple VeSPA (Very Small Processor Architecture) processor is defined - this is a real working device that has been built and tested at the University of Minnesota by the authors. The VeSPA ISA is used throughout the remainder of the book to demonstrate how behavioural and structural models can be developed and intermingled in Verilog. Although Verilog is used throughout, the lessons learned will be equally applicable to other HDLs. Written for senior and graduate students, this book is also an ideal introduction to Verilog for practising engineers.

Product Specifications

Brand: Cambridge University Press
Format: paperback
ASIN: 052104572X
Category: Books > Subjects > Computing & Internet > Computer Science > Architecture & Microprocessors
Domain: Amazon UK
Release Date: 21 August 2008
Listed Since: 29 August 2007

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Cambridge University Press Designing Digital Comp Sys Verilog

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