£108.46

Springer - Logic Synthesis for Low Power VLSI Designs Book

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Description

Logic Synthesis for Low Power VLSI Designs offers a systematic and comprehensive look at power modeling and optimization at the logic level. This technical resource provides a detailed presentation of the methodologies, algorithms, and CAD tools required for power modeling, estimation, and analysis. Designed for professionals and students in computer science and architecture, the text covers essential processes including synthesis and optimization. Readers gain access to detailed descriptions of technology-dependent logic transformations, technology decomposition, and mapping. The book also covers post-mapping structural optimization techniques specifically for low power requirements. This text serves as a deep dive into the tools and methods used to manage power efficiency in modern VLSI design workflows.

Key Features

Comprehensive coverage of power modeling and optimization methodologies at the logic level.

Detailed presentation of algorithms and CAD tools for power estimation and analysis.

In-depth descriptions of technology-dependent logic transformations and optimizations.

Technical guidance on technology decomposition and mapping processes.

Instruction on post-mapping structural optimization techniques for low power design.

Product Specifications

Format
paperback
Domain
Amazon UK
Publication Date
24 October 2012
Listed Since
27 March 2013

Barcode

No barcode data available

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