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Springer Logic Synthesis for Low Power VLSI Designs - Springer

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£109.15 £107.26 £107.67 £108.08 £108.50 £108.91 £109.32 24 July 2026 11 August 2026 29 August 2026 16 September 2026 05 October 2026
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Description

Logic Synthesis for Low Power VLSI Designs by Springer provides a systematic and comprehensive treatment of power modeling and optimization at the logic level. This technical resource delivers detailed methodologies, algorithms and CAD tools for power modeling, estimation and analysis, as well as synthesis and optimization techniques. The book covers technology-dependent logic transformations and optimizations, technology decomposition and mapping, and post-mapping structural optimization techniques specifically designed for low power applications. Ideal for engineers and researchers working with VLSI design, this reference combines theoretical foundations with practical CAD tool guidance to help reduce power consumption in digital circuits.

Key Features

Logic Synthesis for Low Power VLSI Designs covers comprehensive power modeling and optimization methodologies at the logic level.

The book presents detailed algorithms and CAD tool approaches for power estimation and analysis in VLSI design.

Technology-dependent logic transformations and optimizations are thoroughly explained for reducing power consumption.

Post-mapping structural optimization techniques are included to support low power design implementation.

Product Specifications

Format
paperback
Domain
Amazon UK
Publication Date
24 October 2012
Listed Since
27 March 2013

Barcode

No barcode data available

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