MEMORY HIERARCHY DESIGN FOR CHIP MULTIPROCESSORS: A Compiler Directed Approach - Image 1

£56.00

VDM Verlag MEMORY HIERARCHY DESIGN FOR CHIP MULTIPROCESSORS: A Compiler Directed Approach

Name: MEMORY HIERARCHY DESIGN FOR CHIP MULTIPROCESSORS: A Compiler Directed Approach
Brand: VDM Verlag
Price: 56.0 GBP
Availability: InStock

Compilers

Price History & Forecast

Last 65 days • 65 data points (No recent data available)

Historical

Generating forecast...

Price Distribution

Price distribution over 65 days • 1 price levels

Days at Price

Price Analysis

Most common price: £56 (65 days, 100.0%)

Price range: £56 - £56

Price levels: 1 different prices over 65 days

Description

This book presents memory hierarchy design and data access management methodology. First, memory hierarchy design and data allocation problem is discussed, followed by a compiler-driven approach to data compression for reducing memory space occupancy. Third, compiler supported loop-data optimization problem to improve locality of data accesses for a given application code is discussed. Since parallelization is a key concept in achieving the best performance, a constraint network based formulation has been discussed in the fourth chapter. In the last part, book discusses advanced techniques such as the memory optimization in a 3D architecture to minimize data access costs under temperature.

Product Specifications

Brand: VDM Verlag
Format: paperback
ASIN: 3639115155
Category: Books > Subjects > Computing & Internet > Programming > Compilers
Domain: Amazon UK
Release Date: 23 December 2008
Listed Since: 07 January 2009

Barcode

No barcode data available

VDM Verlag MEMORY HIERARCHY DESIGN FOR CHIP MULTIPROCESSORS: A Compiler Directed Approach

Price History & Forecast

Price Distribution

Price Analysis

Description

Product Specifications

Barcode

Similar Products You Might Like

Dynamic Memory Management for Embedded Systems

Advanced Multicore Systems-On-Chip: Architecture, On-Chip Network, Design

Designing 2D and 3D Network-on-Chip Architectures

Energy-Aware Memory Management for Embedded Multimedia Systems: A Computer-Aided Design Approach (Chapman & Hall/CRC Computer and Information Science Series)

Memory Issues in Embedded Systems-on-Chip: Optimizations and Exploration

Springer - Data Access and Storage Management for Processors

Memory Systems: Cache, DRAM, Disk

Programming for Hybrid Multi/Manycore MPP Systems (Chapman & Hall/CRC Computational Science)

Fast, Efficient and Predictable Memory Accesses: Optimization Algorithms for Memory Architecture Aware Compilation

Software approaches for energy-efficient system design: Focused on Dynamic Power Management and program specialization

Energy-Aware Memory Management for Embedded Multimedia Systems: A Computer-Aided Design Approach: 24 (Chapman & Hall/CRC Computer and Information Science Series)

Springer - Source Code Optimization for Embedded Software

Multithreaded Processor Design: 358 (The Springer International Series in Engineering and Computer Science, 358)

Optimizing Compilers for Modern Architectures: A Dependence-based Approach

The X-Legion Compiler: A Compiler Approach to Write and to Optimize Divide-And-Conquer Algorithms

Computer Organisation and Architecture: Evolutionary Concepts, Principles, and Designs

Fundamentals of Parallel Multicore Architecture (Chapman & Hall/CRC Computational Science)

Design of High-Performance Microprocessor Circuits

Networks-on-Chips: Theory and Practice (Embedded Multi-Core Systems)

Optimizing Compilers for Modern Architectures: A Dependence-based Approach

Ultra-Low Energy Domain-Specific Instruction-Set Processors (Embedded Systems)

Advanced Semiconductor Memories: Architectures, Designs, and Applications

Energy Efficient High Performance Processors: Recent Approaches for Designing Green High Performance Computing (Computer Architecture and Design Methodologies)

Springer - Task Scheduling for Multi-core Architectures Book