VLSI-Entwurf eines RISC-Prozessors: Eine Einführung in das Design großer Chips und die Hardware-Beschreibungssprache VERILOG HDL (Lehrbuch Informatik) - Image 1

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Vieweg+Teubner Verlag VLSI-Entwurf eines RISC-Prozessors: Eine Einführung in das Design großer Chips und die Hardware-Beschreibungssprache VERILOG HDL (Lehrbuch Informatik)

Name: VLSI-Entwurf eines RISC-Prozessors: Eine Einfuhrung in das Design gro er Chips und die Hardware-Beschreibungssprache VERILOG HDL (Lehrbuch Informatik)
Brand: Vieweg+Teubner Verlag
Price: 50.85 GBP
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Engineering & Technology

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Dieses Lehr- und Arbeitsbuch führt in den modernen Entwurf großer Chips ein. Ein großer, leistungsfähiger RISC-Prozessor wird in einer Hardware-Beschreibungssprache (HDL) spezifiziert, hierarchisch entwickelt und schließlich als Gattermodell dem Halbleiterhersteller zur Fertigung übergeben. Das Ergebnis ist ein Semi-Custom-Prozessor mit über 100.000 Bruttogattern und einer Rechenleistung von bis zu 40 MIPS. Das Buch mit Diskette führt auch ausführlich in die HDL VERILOG ein. About the Author Prof. Dr. Ulrich Golze ist Professor für den Entwurf integrierter Schaltungen an der TU Braunschweig.

Product Specifications

Brand: Vieweg+Teubner Verlag
Format: paperback
ASIN: 3322890104
Category: Books > Subjects > Science, Nature & Maths > Engineering & Technology
Domain: Amazon UK
Publication Date: 11 April 2014
Listed Since: 17 April 2014

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Vieweg+Teubner Verlag VLSI-Entwurf eines RISC-Prozessors: Eine Einführung in das Design großer Chips und die Hardware-Beschreibungssprache VERILOG HDL (Lehrbuch Informatik)

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This is the most expensive it has ever been. Walk away.

Vieweg+Teubner Verlag VLSI-Entwurf eines RISC-Prozessors: Eine Einführung in das Design großer Chips und die Hardware-Beschreibungssprache VERILOG HDL (Lehrbuch Informatik)

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