Design Methodology for RF CMOS Phase Locked Loops - Image 1

£72.45

Artech House Design Methodology for RF CMOS Phase Locked Loops

Name: Design Methodology for RF CMOS Phase Locked Loops
Brand: Artech House
Price: 69.71 GBP
Availability: InStock

Electrical

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Description

Engineers face stiff challenges in designing phase-locked loop (PLL) circuits for wireless communications thanks to phase noise and other obstacles. This practical book comes to the rescue with a proven PLL design and optimization methodology that lets designers assess their options, predict PLL behavior, and develop cost-effective PLLs that meet performance requirements no matter what IC (integrated circuit) challenges they come up against. This uniquely comprehensive toolkit takes designers step-by-step through operation principles, design procedures, phase noise analysis, layout considerations, and CMOS realizations for each PLL building block. It provides a sample design of a fully integrated PLL for WLAN applications, demonstrating every step from specs definition and circuit characterization to layout generation and circuit schematics.

Product Specifications

Brand: Artech House
Format: hardcover
ASIN: 1596933836
Category: Books > Subjects > Science, Nature & Maths > Engineering & Technology > Electrical
Domain: Amazon UK
Release Date: 31 January 2009
Listed Since: 08 September 2008

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Artech House Design Methodology for RF CMOS Phase Locked Loops

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