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Springer Quick-Turnaround ASIC Design in VHDL - Core-Based Behavioral Synthesis

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Description

This comprehensive guide addresses the challenges of modern digital signal processing applications by presenting practical approaches to ASIC design using VHDL and core-based behavioral synthesis. The book explores how complex DSP algorithms can be efficiently realized within tight performance constraints by leveraging reusable canonical subtasks such as IIR and FIR filters and FFTs. Part of Springer's prestigious International Series in Engineering and Computer Science (volume 367), this resource provides essential techniques for system designers working to compose core entities into cohesive, high-performance solutions. The methodology bridges the gap between algorithm specification and hardware implementation, making it invaluable for engineers seeking to optimise design cycles whilst maintaining functionality and meeting stringent performance requirements in digital systems.

Key Features

Focuses on VHDL-based ASIC design methodologies for rapid turnaround in modern digital signal processing applications.

Explains core-based behavioral synthesis techniques that enable reuse of canonical subtasks like IIR filters, FIR filters, and FFT implementations.

Part of Springer's International Series in Engineering and Computer Science volume 367, offering academic rigour and industry-relevant insights.

Addresses the composition of core entities to achieve both intended functionality and required performance constraints in complex systems.

Product Specifications

Format
paperback
Domain
Amazon UK
Release Date
28 September 2011
Listed Since
12 July 2012

Barcode

No barcode data available

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