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Springer Low Power Digital CMOS Design - Springer Engineering

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Description

Power consumption has become a critical design consideration for battery-operated portable systems and high-performance desktop systems alike. This comprehensive guide addresses the challenge of meeting strict power dissipation limitations whilst maintaining ever-higher computational requirements. The book explores a systematic approach spanning all levels of system design, from algorithms and architectures through to logic styles and underlying technology. It examines architecture optimisation combined with voltage scaling techniques, enabling designers to balance silicon area against power efficiency. Ideal for engineers and computer scientists working on embedded systems, mobile devices, and energy-efficient computing solutions, this Springer publication provides essential strategies for implementing low-power digital CMOS design across diverse applications.

Key Features

The Low Power Digital CMOS Design guide covers algorithm and architecture optimisation strategies for reducing power consumption in digital systems.

Voltage scaling and silicon area trade-offs are explored as fundamental techniques for achieving efficient low-power design implementations.

This Springer engineering text addresses power dissipation challenges specific to both battery-operated portable systems and high-performance computing.

The comprehensive approach spans from logic style selection to technology-level considerations, providing multi-level design methodology for CMOS circuits.

The book targets computer scientists and hardware engineers designing embedded systems, mobile devices, and energy-constrained computing platforms.

Product Specifications

Format
hardcover
Domain
Amazon UK
Release Date
30 June 1995
Listed Since
14 December 2006

Barcode

No barcode data available

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