Network Intrusion Detection Based on Shift-OR Circuit: A High Performance Circuit Design Applied to Network Intrusion Detection System on a SoPC Platform - Image 1

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LAP Lambert Academic Publishing Network Intrusion Detection Based on Shift-OR Circuit: A High Performance Circuit Design Applied to Network Intrusion Detection System on a SoPC Platform

Name: Network Intrusion Detection Based on Shift-OR Circuit: A High Performance Circuit Design Applied to Network Intrusion Detection System on a SoPC Platform
Brand: LAP Lambert Academic Publishing
Price: 42.0 GBP
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Electronics Engineering

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Description

This thesis introduces a novel FPGA based signature match co-processor that can serve as the core of a hardware-based network intrusion detection system (NIDS). The central idea of the signature match co-processor is an architecture based on the shift-or algorithm, which utilizes simple shift registers, OR gates, and ROMs where patterns are stored. Moreover, the architecture can be improved further by the removal of the ROM. The proposed architecture has been prototyped, simulated and synthesized by the Altera Stratix FPGA. Experimental results reveal that the circuit with processing two characters at a time attains the throughput up to 6.75 Gbits/sec with area cost of 0.7 logic elements (LEs) per character. The circuit with processing four input characters at a time achieves the throughput up to 9.2 Gbits/sec with area cost of 2.75 LE per character. As proposed architecture achieves higher throughput and less hardware resource in the FPGA implementations of NIDS.

Product Specifications

Brand: LAP Lambert Academic Publishing
Format: paperback
ASIN: 3846591173
Category: Books > Subjects > Science, Nature & Maths > Engineering & Technology > Electronics & Communications Engineering > Electronics Engineering
Domain: Amazon UK
Release Date: 29 November 2011
Listed Since: 02 December 2011

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LAP Lambert Academic Publishing Network Intrusion Detection Based on Shift-OR Circuit: A High Performance Circuit Design Applied to Network Intrusion Detection System on a SoPC Platform

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