Power and Area Optimization in NoC by using Tailor Made Partitioning - Image 1

£43.00

LAP Lambert Academic Publishing Power and Area Optimization in NoC by using Tailor Made Partitioning

Name: Power and Area Optimization in NoC by using Tailor Made Partitioning
Brand: LAP Lambert Academic Publishing
Price: 43.0 GBP
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Electronics Engineering

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Description

NoC became a new paradigm to replace the SoC since the existing bus based system unable to accommodate the complexity of the SoC. A huge number of components were involved in the on-chip design. Each of these components needs to communicate with each other and carry their own function that will affect the scalability and the testability of the SoC in general. This project analyzes the main sources of power consumption in NoC based systems. Analytical power models of global interconnection links are studied at different levels of abstraction. Additionally, power measurement experiments are performed for different types of n-level network with related to die area of NoC.

Product Specifications

Brand: LAP Lambert Academic Publishing
Format: paperback
ASIN: 3659908029
Category: Books > Subjects > Science, Nature & Maths > Engineering & Technology > Electronics & Communications Engineering > Electronics Engineering
Domain: Amazon UK
Release Date: 21 June 2016
Listed Since: 14 July 2016

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LAP Lambert Academic Publishing Power and Area Optimization in NoC by using Tailor Made Partitioning

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