CRC Press Nano-CMOS Gate Dielectric Engineering

Product Description According to Moore’s Law, not only does the number of transistors in an integrated circuit double every two years, but transistor size also decreases at a predictable rate. At the rate we are going, the downsizing of CMOS transistors will reach the deca-nanometer scale by 2020. Accordingly, the gate dielectric thickness will be shrunk to less than half-nanometer oxide equivalent thickness (EOT) to maintain proper operation of the transistors, leaving high-k materials as the only viable solution for such small-scale EOT. This comprehensive, up-to-date text covering the physics, materials, devices, and fabrication processes for high-k gate dielectric materials, Nano-CMOS Gate Dielectric Engineering systematically describes how the fundamental electronic structures and other material properties of the transition metals and rare earth metals affect the electrical properties of the dielectric films, the dielectric/silicon and the dielectric/metal gate interfaces, and the resulting device properties. Specific topics include the problems and solutions encountered with high-k material thermal stability, defect density, and poor initial interface with silicon substrate. The text also addresses the essence of thin film deposition, etching, and process integration of high-k materials in an actual CMOS process. Fascinating in both content and approach, Nano-CMOS Gate Dielectric Engineering explains all of the necessary physics in a highly readable manner and supplements this with numerous intuitive illustrations and tables. Covering almost every aspect of high-k gate dielectric engineering for nano-CMOS technology, this is a perfect reference book for graduate students needing a better understanding of developing technology as well as researchers and engineers needing to get ahead in microelectronic engineering and materials science. Review ... this book, by covering almost every aspect of high-k gate dielectric engineering for nano-CMOS technology, is as timely as ever for device and process engineers. Though it involves quite a lot of physics, it is never less than fascinating, through its many intuitive illustrations and tables. ―From the Foreword by Hiroshi Iwai, PhD, Professor, Tokyo Institute of Technology, Japan About the Author Hei Wong received a B.Sc. degree iIi electronics from the Chinese University of Hong Kong and a Ph.D. in electrical and electronic engineering from the University of Hong Kong. Dr. Wong joined the faculty of the Department of Electronic Engineering at City University of Hong Kong in 1989 and is currently a full professor of the Department. He was a visiting professor for the 21 Century Centre of Excellent (COE21) for Photonics-Nanodevice Integration Engineering, Tokyo Institute of Technology, Japan. Dr. Wong was the chair for the IEEE ED/SSC Hong Kong Joint Chapter during 2002-2003. He is a member of the international steering committees, technical program committees, and organizing committees for many international and local conferences.