Mixed-Signal CMOS for Wireline Communication: Transistor-Level and System-Level Design Considerations - Image 1

£86.59

Cambridge University Press Mixed-Signal CMOS for Wireline Communication: Transistor-Level and System-Level Design Considerations

Name: Mixed-Signal CMOS for Wireline Communication: Transistor-Level and System-Level Design Considerations
Brand: Cambridge University Press
Price: 83.05 GBP
Availability: InStock

Circuits

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Description

Get up to speed with the fundamentals of complementary metal oxide semiconductor (CMOS) for wireline communication with this practical introduction, from short-reach optical links to various electrical links. It presents practical coverage of the state of the art, equipping readers with all the tools needed to understand these circuits and then design their own. A comprehensive treatment of components, including details for front-end circuits, equalizers, oscillators, phase-locked loops and clock and data recovery systems, accompanies significant coverage of inverter-based circuits, preparing the reader for modern designs in nano-scale CMOS. Numerous inline examples demonstrate concepts and solutions, allowing readers to absorb the theory and confidently apply concepts to new scenarios. Suitable for graduate students and professional engineers working in mixed-signal integrated circuit design for high-speed interconnects, and including over 100 end-of-chapter problems to extend learning (with online solutions for instructors), this versatile book will equip readers with an unrivalled understanding of exactly what goes into a modern wireline link – and why.

Product Specifications

Brand: Cambridge University Press
Format: hardcover
ASIN: 110849000X
Category: Books > Subjects > Science, Nature & Maths > Engineering & Technology > Electronics & Communications Engineering > Electronics Engineering > Circuits
Domain: Amazon UK
Release Date: 12 December 2024
Listed Since: 04 March 2024

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Cambridge University Press Mixed-Signal CMOS for Wireline Communication: Transistor-Level and System-Level Design Considerations

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