Woodhead Publishing Industry Standard FDSOI Compact Model BSIM-IMG for IC Design (Woodhead Publishing Series in Electronic and Optical Materials)

Product Description Industry Standard FDSOI Compact Model BSIM-IMG for IC Design helps readers develop an understanding of a FDSOI device and its simulation model. It covers the physics and operation of the FDSOI device, explaining not only how FDSOI enables further scaling, but also how it offers unique possibilities in circuits. Following chapters cover the industry standard compact model BSIM-IMG for FDSOI devices. The book addresses core surface-potential calculations and the plethora of real devices and potential effects. Written by the original developers of the industrial standard model, this book is an excellent reference for the new BSIM-IMG compact model for emerging FDSOI technology. The authors include chapters on step-by-step parameters extraction procedure for BSIM-IMG model and rigorous industry grade tests that the BSIM-IMG model has undergone. There is also a chapter on analog and RF circuit design in FDSOI technology using the BSIM-IMG model. Provides a detailed discussion of the BSIM-IMG model and the industry standard simulation model for FDSOI, all presented by the developers of the model Explains the complex operation of the FDSOI device and its use of two independent control inputs Addresses the parameter extraction challenges for those using this model Review Provides the foundation for understanding the complexity of FDSOI device operation and its simulation model About the Author Chenming Hu is Distinguished Chair Professor Emeritus at UC Berkeley. He was the Chief Technology Officer of TSMC and founder of Celestry Design Technologies. He is best known for developing the revolutionary 3D transistor FinFET that powers semiconductor chips beyond 20nm. He also led the development of BSIM-- the industry standard transistor model that is used in designing most of the integrated circuits in the world. He is a member of the US Academy of Engineering, the Chinese Academy of Science, and Academia Sinica. His honors include the Asian American Engineer of the Year Award, IEEE Andrew Grove Award and Solid Circuits Award as well as Nishizawa Medal, and UC Berkeley's highest honor for teaching-- the Berkeley Distinguished Teaching Award. Sourabh Khandelwal is currently a Postdoctoral Researcher in the BSIM Group, University of California, Berkeley. Sourabh received his PhD degree from Norwegian University of Science and Technology in 2013 and Masters’ degree from Indian Institute of Technology (IIT) Bombay in 2007. From 2007 - 2010 he worked as a Research Engineer at IBM Semiconductor Research and Development Centre, developing compact models for RF SOI devices. He holds a patent and has authored several research papers in the area of device modeling and characterization. His PhD work on GaN compact model is under consideration for industry standardization by the Compact Model Coalition. Yogesh S. Chauhan is an assistant professor in EE department at Indian Institute of Technology Kanpur, India. He received Ph.D. degree in compact modeling of high voltage MOSFETs in 2007 from EPFL Switzerland. During 2007-2010, he was manager in IBM Bangalore where he led compact modeling team focusing on RF bulk and SOI transistors and ESD modeling team. During 2010-2012, he was postdoctoral fellow at University of California Berkeley, where he worked on development of bulk and multigate transistor models including BSIM6, BSIM-IMG and BSIM-CMG. He received IBM faculty award in 2013 for his contribution in compact modeling. He has co-authored over 50 conference and journal publications in the field of device compact modeling. Director of RF Innovation at Globalfoundries, USA Principal Member of Technical Staff at Globalfoundries USA